Verilog Meetup
Sunday, August 30, 2026
08:00 AM GMT-7
Monday, August 31, 2026
02:00 PM GMT-7
Price
Free
Free entry
Register Now
Registration happens elsewhere This event takes registrations on another site. Your seat is confirmed there, not on Event Match.
Who should you meet at this event?
Builds AI twins of you and the attendees from your digital footprints, then puts them in one-on-one meetings. When the simulation ends you keep the five best conversations: why that person, what to talk about, how to open.
Not a registration: your seat is unaffected. We'll tell you when the result is ready.
Attendees
Sign in to see the attendees.
About the Event
We continue to work on developing hands-on exercises and educational materials that include:
Tutorial-level examples working on FPGA boards from multiple
vendors - Xilinx, Altera, Gowin, Lattice, Efinix.
More involving examples with sound recognition and graphics generation.
Interview-level microarchitectural examples with pipelines, FIFOs
and flow control.
CPU-oriented exercises, from a trivial single-cycle CPU to
pipelined, out-of-order and multicore designs with caches and branch
predictors.
Experiments with open-source ASIC design tools and the affordable
manufacturing options (Tiny Tapeout).
For more information see https://verilog-meetup.com
Thank you,
Yuri Panchul
Venue Details
Hacker Dojo
Hacker Dojo, Mountain View, California
Explore nearby
